[SYSTEM INIT] // PERMANENT MACHINE ARCHITECTURE // v0.1-alpha

PERMANENT MACHINE

ARCHITECTURE

— Write Once. Run Forever. —

The Permanent Machine Architecture defines a complete, immutable whole-computer ISA — CPU, display, input, and beyond. Software compiled for PMA runs identically on every conforming implementation, today and decades from now.

Explore the Spec View Assembly

CLASSIFIED

[PROBLEM IDENTIFIED]

The Compatibility Gap

x86 conquered CPU instruction compatibility. But every other layer of the machine — display, input, audio, storage — gets rewritten every decade. PMA extends compatibility to the whole machine.

Layer	x86 / Linux	POSIX / BSD	Embedded (bare)	PMA
CPU ISA binary compat	YES	PARTIAL	NO	YES
Display / framebuffer	NO	NO	NO	FIXED
Keyboard / pointer input	NO	NO	NO	FIXED
Audio output	NO	NO	NO	FIXED
Storage / persistence	FS-LAYER	FS-LAYER	NO	FIXED
Interrupt / timer model	PARTIAL	N/A	VENDOR	FIXED
Boot protocol	BIOS/EFI	N/A	VENDOR	ELF-NATIVE
Device discovery	ACPI/DTB	N/A	HARDCODED	TABLE

[CORE FEATURES]

System Specification

Six pillars that define the permanent machine — every conforming implementation must honour all of them, without exception.

01 //

△

RISC-V Foundation

Built on RV64IMAZicsr_Zifencei — the proven, royalty-free 64-bit RISC-V base. Atomic extensions, CSR access, fence semantics, and cache-coherence guarantees are all part of the contract.

// RV64IMAC

02 //

▤

Whole-Machine Spec

Not just a CPU ISA. PMA specifies the entire observable computer: display resolution and pixel format, keyboard scan codes, audio sample rate, block storage geometry, and the timer frequency. One spec, zero gaps.

// FULL STACK

03 //

■

Fixed Address Map

Every device lives at a fixed, published address — forever. DRAM at 0x80000000, device table at 0x10000000, CLINT at 0x02000000, PLIC at 0x0C000000. No probing. No runtime negotiation.

// IMMUTABLE MAP

04 //

◆

ELF-Native Boot

Drop an ELF binary and the machine boots. No BIOS. No UEFI. No bootloader required. The implementation loads the ELF segments, sets up the stack, and jumps to _start. Truly bare metal.

// ZERO OVERHEAD

05 //

▲

Discoverable Devices

A compact binary device table at 0x10000000 describes every device present: type tag, MMIO base, IRQ line, and capability flags. Software can enumerate what hardware exists without vendor-specific tables or firmware blobs.

// SELF-DESCRIBING

06 //

◇

Bare-Metal Direct

No operating system required. A PMA program accesses hardware through documented MMIO registers. There is no syscall layer, no kernel, no hypervisor — just your code and the machine as specified.

// DIRECT ACCESS

SYSTEM

[ADDRESS SPACE]

Physical Memory Map

RV64 physical address space — 64-bit flat, fixed layout. Every conforming PMA implementation must honour this map exactly.

0x80000000

DRAM (main memory) configurable

0x10000000

Device Table & MMIO Space 0x10000000 – 0x1FFFFFFF

0x0C000000

PLIC (interrupt controller) 4 MiB

0x02000000

CLINT (timer / IPI) 64 KiB

0x00010000

Boot ROM 64 KiB

0x00000000

Reserved / trap 64 KiB

[CODE DEMO]

Assembly on the Bare Metal

Write directly to MMIO. No OS. No drivers. Just your program and the spec.

hello_pma.S

# PMA bare-metal hello — RV64IMA
# Writes pixels directly to the framebuffer
# No OS. No syscalls. Just the spec.

.section .text
.global _start

# ── Constants from PMA spec ──────────────
.equ DEVTAB,    0x10000000  # device table
.equ FB_BASE,   0x10100000  # framebuffer
.equ FB_W,      640
.equ FB_H,      480
.equ CLINT_MTIME, 0x0200BFF8

_start:
    # set up stack at top of DRAM
    lui   sp, 0x80400   # sp = 0x80400000

    # load framebuffer base
    lui   a0, 0x10100   # a0 = FB_BASE
    li    t0, 0         # pixel index
    li    t1, 307200    # 640 * 480

.fill_loop:
    bge   t0, t1, .done
    # pixel = magenta (ARGB: 0xFFFF2D78)
    li    t2, 0xFFFF2D78
    sw    t2, 0(a0)    # write pixel
    addi  a0, a0, 4
    addi  t0, t0, 1
    j     .fill_loop

.done:
    # halt — spin forever
    j     .done

// PMA // LIVE RENDER

How it works

#1 The ELF loader maps segments into DRAM starting at 0x80000000.

#2 Execution jumps to _start. No firmware or boot shim involved.

#3 Pixel writes to 0x10100000 appear immediately on the PMA framebuffer.

#4 The same binary, unchanged, runs on every conforming PMA implementation.

ROADMAP

[DEVELOPMENT STATUS]

Roadmap

The PMA specification and reference emulator are under active development.

ACTIVE Phase I

RV64IMAZicsr_Zifencei emulation core

Physical memory map — ROM, DRAM, MMIO

CLINT — timer and inter-processor interrupts

PLIC — platform-level interrupt controller

ELF binary loader (bare-metal entry)

Fixed-resolution framebuffer MMIO

Keyboard MMIO — PS/2 scancode model

QUEUED Phase II

Audio device — PCM output MMIO

Block storage — sector-addressed MMIO

Network device — Ethernet-like MMIO

RTC — real-time clock register

Device table binary format finalise

Formal spec document (PDF + machine-readable)

Conformance test suite v1.0

PLANNED Phase III

Hardware implementation (FPGA reference design)

C standard library port (PMA libc)

Rust & Zig bare-metal crate / package

Multi-hart (SMP) support

Hypervisor extension (H-mode)

PMA certification programme

Long-term archival binary repository